A radio frequency power amplifier has such input and output characteristics that (i) when input power is low, a signal is amplified while maintaining constant gain in a linear region, and (ii) as the input power increases and gain begins to decrease, output power becomes constant in a saturation region regardless of the input power level.
For example, a Doherty amplifier is known as a representative technique for increasing the power added efficiency (PAE) in the linear region. Furthermore, for example, a class F amplifier is known as a technique for increasing the PAE in the saturation region.
A class F amplifier using a field effect transistor (FET) makes the temporal waveform of the voltage of the drain terminal of the FET closer to a square wave, and decreases the area of the overlapping portion of the temporal waveform of the drain terminal voltage and the temporal waveform of the drain terminal current, by short circuiting the load at an even harmonic as seen from the drain terminal of the FET and opening the load at an odd harmonic as seen from the drain terminal (referred to as class F load conditions). Consequently, the power consumed by the FET decreases, resulting in extremely high PAE (for example, see Patent Literature (PTL) 1).
However, in practice, even if a class F load circuit, which short circuits the load at an even harmonic and opens the load at an odd harmonic, is provided at the output side of the FET, influences of parasitic components of the FET hinder high-efficiency operation. A FET has parasitic capacitance between the drain and the source, which influences the temporal waveforms of the voltage and current of the drain terminal. Hence, a class F load circuit needs to be designed considering the parasitic capacitance between the drain and the source (For example, see PTL 2).